Some microcontroller systems include integrated on-chip debug features that permit a user to debug programs executed on the microcontroller system. Low bandwidth features, such as break points and run/stop control, can be accessed by a serial protocol, such as Joint Test Action Group (JTAG). For high bandwidth features, such as real-time capture of program count (PC) values, a more complex parallel trace port may be required.
In some systems, the JTAG interface may require the CPU to be halted in a debug mode for the JTAG interface to transmit commands to observe the state of the system. One task during a typical debug session is determining the location of the current PC when the CPU is halted in debug mode. In some conventional systems, the PC values can be saved in a processor register when the CPU is halted in debug mode. In some current systems, the processor register cannot be read directly by the JTAG interface, but must be transferred from the processor register to a debug register readable by the JTAG interface. This may be accomplished by scanning in a number of CPU instructions using the JTAG interface. The instructions direct the processor to transfer the PC value to a debug register that the JTAG interface may access. This procedure can enable the debugger to observe the PC of the CPU, but it is complicated and may require the debugger to have explicit knowledge of the register implementation and the instruction operational codes of the CPU so that the debugger may issue commands to the CPU to move the PC value from the processor register to the debug register.